Hierarchical verification of asynchronous circuits using temporal logic
نویسندگان
چکیده
منابع مشابه
Hierarchical Verification of Asynchronous Circuits Using Temporal Logic
Establishing the correctness of complicated asynchronous circuit is in general quite difficult because of the high degree of nondeterminism that is inherent in such devices. Nevertheless, it is also very important in view of the cost involved in design and testing of circuits. We show how to give specifications for circuits in a branching time temporal logic and how to mechanically verify them ...
متن کاملVerification of Asynchronous Circuits using Timed Automata
In this work we apply the timing veriication tool OpenKronos, which is based on timed automata, to verify correctness of numerous asynchronous circuits. The desired behavior of these circuits is speciied in terms of signal transition graphs (STG) and we check whether the synthesized circuits behave correctly under the assumption that the inputs satisfy the STG conventions and that the gate dela...
متن کاملVerification of asynchronous circuits
The purpose of this thesis is to introduce proposition-oriented behaviours and apply them to the verification of asynchronous circuits. The major contribution of propositionoriented behaviours is their ability to extend existing formal notations to permit the explicit use of both signal levels and transitions. This thesis begins with the formalisation of proposition-oriented behaviours in the c...
متن کاملAutomatic Verification of Asynchronous Circuits
Asynchronous circuits are often used in interface circuitry where traditional, synchronous design methods are not applicable. However, the veriication of asynchronous designs is dii-cult, because standard simulation techniques will often fail to reveal design errors that are only manifested under rare circumstances. In this paper, we show how asynchronous designs can be modeled as programs in t...
متن کاملLocally Asynchronous Logic Circuits
Abslrucb-New CMOS differential logic circuits, callsd asynchronous latched CMOS differential logic (ALCDL) circuits, are proposed and analyzed. The ALCDL can implement a complex function in a single gate and achieve high operation speed without dc power dissipation. New CMOS differential latches, which can be used to prevent extra transitions and reduce the power dissipation, are also proposed....
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Theoretical Computer Science
سال: 1985
ISSN: 0304-3975
DOI: 10.1016/0304-3975(85)90223-3